News | CHIP on the sands 2017


Dear attendees of Chip on the Sands, in this year Accelera will provide on Aug. 29 (Tuesday) the tutorial named “UVM for RTL Designers”. This tutorial will be taught by Srinivasan Venkataramanan (short bio below). Knowing that safety in electronic circuits is taking a central stage with growing automotive and IoT systems. This tutorial will provide an approach to verify the functionality of the designs at the pre-silicon stage.

Abstract of Tutorial:

Universal Verification Methodology (UVM) has taken the Design Verification (DV) field by storm! UVM is the de-facto approach to verifying any electronic design being developed at RTL abstraction and above. With UVM becoming an IEEE standard as IEEE 1800.2, it is all set to reach even wider audience across the globe. UVM is also a great field for researchers in leading academic institutions to expand its capabilities, make additional “apps” on top of UVM etc. While UVM has been very / successful with DV teams, the traditional design and small time verification teams have looked at UVM and a bit taken back by the complexity of UVM. In addition, there are significant challenges in creating full-fledged UVM environment for non-OOP users. This is especially true for young graduates involved in the field of digital circuit design, as they need quick ram-up to this omnipresent methodology as they prepare themselves to enter the industry. Go2UVM is an open-source / layer developed on top of standard UVM to address these challenges and more. In this tutorial we present the basics of Go2UVM and how it can help young graduates to quickly adopt this methodology. It will also present key productivity applications developed along with popular FPGA tools to expedite UVM adoption in the FPGA community. Towards the end of this tutorial, we will also present some of the emerging trends in Design-Verification including automotive and safety / verification and how researchers can contribute to these challenges via Go2UVM. / Short bio of the speaker: Srinivasan Venkataramanan (Srini) is a technology expert and an entrepreneur with close to 20 years of industry experience in the field of VLSI Design, Verification and EDA. Srini is the founder of VerifWorks, an EDA & DV start-up from India. Srini is also the Chief Technology Officer (CTO) at CVC Pvt. Ltd. (, a global leader in VLSI training. Srini has worked at leading edge design houses such as Intel, Philips, Realchip communications / etc. earlier. He has been training thousands of engineers across the globe on various Verification related topics such as SystemVerilog, UVM, OVM, VMM, Specman etc. Srini has co-authored several books on Verification. Srini holds a Masters degree in VLSI from IIT-Delhi.

Schedule: Tuesday, August, 29th - 8:20h - 12:20h - Creta room.